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400G QSFP-DD DAC

400G QSFP-DD DAC

QSFP-DD passive copper cable assembly feature eight differential copper pairs, providing four data transmission channels at speeds up to 56Gbps(PAM4) per channel, and meets 400G Ethernet and InfiniBand requirements. Available in a broad rang of wire gages from 28AWG through 30AWG-this 400G copper cable assembly features low insertion loss and low cross talk.

QSFP-DD uses PAM4 signals for transmission, which doubles the rate. However, there are more stringent requirements for cable insertion loss. For detailed requirements, please see High Speed Characteristics.

Features of 400G QSFP-DD DAC

  • Compatible with IEEE 802.3bj and IEEE 802.3cd

  • Supports aggregate data rates of 400Gbps(PAM4)

  • Optimized construction to minimize insertion loss and cross talk

  • Pull-to-release slide latch design

  • 28AWG through 30AWG cable

  • Straight and break out assembly configurations available

  • Customized cable braid termination limits EMI radiation

  • Customizable EEPROM mapping for cable signature

  • RoHS Compatible



Applications of 400G QSFP-DD DAC

  • Switches, servers and routers

  • Data Center networks

  • Storage area networks

  • High performance computing

  • Telecommunication and wireless infrastructure

  • Medical diagnostics and networking

  • Test and measurement equipment

  • 400G Ethernet(IEEE 802.3cd)

  • InfiniBand

Specifications of 400G QSFPDD DAC

Recommended Operation Condition
Pin Descriptions
High Speed Characteristics

Parameter

Symbol

Min

Max

Unit

Operating Case Temperature

Topc

0

70

degC

Storage Temperature

Tst

-40

85

degC

Relative Humidity (non-condensation)

RS

35

60

%

Supply Voltage

VCC3

3.135

3.465

V

Voltage on LVTTL Input

Vilvttl

-0.3

VCC3  +0.2

V

Power Supply Current

ICC3

-

15

mA

Total Power Consumption

Pd

-

0.05

W

Notes:

Stress or conditions exceed the above range may cause permanent damage to the device.

This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not applied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.


Pin

Logic

Symbol

Description

1

-

GND

Ground

2

CML-I

Tx2n

Transmitter Inverted Data Input

3

CML-I

Tx2p

Transmitter Non-Inverted Data Input

4

-

GND

Ground

5

CML-I

Tx4n

Transmitter Inverted Data Input

6

CML-I

Tx4p

Transmitter Non-Inverted Data Input

7

-

GND

Ground

8

LVTTL-I

ModSelL

Module Select

9

LVTTL-I

ResetL

Module Reset

10

-

Vcc Rx

+3.3V Power Supply Receiver

11

LVCMOS-

SCL

2-wire serial interface clock


I/O



12

LVCMOS-

SDA

2-wire serial interface data


I/O



13

-

GND

Ground

14

CML-O

Rx3p

Receiver Non-Inverted Data Output

15

CML-O

Rx3n

Receiver Inverted Data Output

16

-

GND

Ground

17

CML-O

Rx1p

Receiver Non-Inverted Data Output

18

CML-O

Rx1n

Receiver Inverted Data Output

19

-

GND

Ground

20

-

GND

Ground

21

CML-O

Rx2n

Receiver Inverted Data Output

22

CML-O

Rx2p

Receiver Non-Inverted Data Output

23

-

GND

Ground

24

CML-O

Rx4n

Receiver Inverted Data Output

25

CML-O

Rx4p

Receiver Non-Inverted Data Output

26

-

GND

Ground

27

LVTTL-O

ModPrsL

Module Present

28

LVTTL-O

IntL

Interrupt

29

-

Vcc Tx

+3.3V Power supply transmitter

30

-

Vcc1

+3.3V Power supply

31

LVTTL-I

LPMode

Low Power Mode

32

-

GND

Ground

33

CML-I

Tx3p

Transmitter Non-Inverted Data Input

34

CML-I

Tx3n

Transmitter Inverted Data Input

35

-

GND

Ground

36

CML-I

Tx1p

Transmitter Non-Inverted Data Input

37

CML-I

Tx1n

Transmitter Inverted Data Input

38

-

GND

Ground

39

-

GND

Ground

40

CML-I

Tx6n

Transmitter Inverted Data Input

41

CML-I

Tx6p

Transmitter Non-Inverted Data Input

42

-

GND

Ground

43

CML-I

Tx8n

Transmitter Inverted Data Input

44

CML-I

Tx8p

Transmitter Non-Inverted Data Input

45

-

GND

Ground

46

-

Reserved

-

47

-

VS1

-

48

-

VccRx1

+3.3V Power supply

49

-

VS2

-

50

-

VS3

-

51

-

GND

Ground

52

CML-O

Rx7p

Receiver Non-Inverted Data Output

53

CML-O

Rx7n

Receiver Inverted Data Output

54

-

GND

Ground

55

CML-O

Rx5p

Receiver Non-Inverted Data Output

56

CML-O

Rx5n

Receiver Inverted Data Output

57

-

GND

Ground

58

-

GND

Ground

59

CML-O

Rx6n

Receiver Inverted Data Output

60

CML-O

Rx6p

Receiver Non-Inverted Data Output

61

-

GND

Ground

62

CML-O

Rx8n

Receiver Inverted Data Output

63

CML-O

Rx8p

Receiver Non-Inverted Data Output

64

-

GND

Ground

65

-

NC

-

66

-

Reserved

-

67

-

VccTx1

+3.3V Power supply

68

-

VCC2

+3.3V Power supply

69

-

Reserved

-

70

-

GND

Ground

71

CML-I

Tx7p

Transmitter Non-Inverted Data Input

72

CML-I

Tx7n

Transmitter Inverted Data Input

73

-

GND

Ground

74

CML-I

Tx5p

Transmitter Non-Inverted Data Input

75

CML-I

Tx5n

Transmitter Inverted Data Input

76

-

GND

Ground


Parameter

Symbol

Min

Typical

Max

Unit

Note

Differential Impedance

TDR

90

100

110

Ώ

-

Insertion loss

SDD21

-16.06

-

-8

dB

At 13.28 GHz

Differential Return Loss

SDD11

SDD22

-12.45

-

See 1

dB

At 0.05 to 4.1 GHz

-3.12

-

See 2

dB

At 4.1 to 19 GHz

Common-mode to common-mode output return loss

SCC11

SCC22

-

-

-2

dB

At 0.2 to 19 GHz

Differential to common-mode

return loss

SCD11

SCD22

-12

-

See 3

dB

At 0.01 to 12.89 GHz

-10.58

-

See 4

At 12.89 to 19 GHz

Differential to common Mode

Conversion Loss

SCD21-IL

-

-

-10

dB

At 0.01 to 12.89 GHz

-

-

See 5

At 12.89 to 15.7 GHz

-

-

-6.3

At 15.7 to 19 GHz

Channel Operating Margin

COM

-

-

-3

dB

-



Pin Descriptions of 400G QSFP-DD DAC

Pin Descriptions of 400G QSFP-DD DAC


Ordering Information of 400G QSFP-DD DAC

400G QSFPDD Copper Cable Assemblies, Passive.

P/N

Length

Data Rate

AWG

Length Tolerance

TSQS-PC4HG-01M

1M

400G

30

+3.5/-3.5cm

TSQS-PC4HG-02M

2M

400G

28

+3.5/-3.5cm

TSQS-PC4HG-03M

3M

400G

28

+4/-4cm


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